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rsing108's avatar
rsing108
Icon for Occasional Contributor rankOccasional Contributor
5 years ago

STRATIX 10 PCIE + HARD IP ERROR WHILE SIMULATING EXAMPLE DESIGN ON MODELSIM

Hi, I am trying to simulate the Avalon memory mapped Intel Stratix® 10 Hard IP+ for PCIE example design for Stratix 10 MX by following the instructions of https://www.intel.com/content/www/us/en/pr...
BoonT_Intel's avatar
BoonT_Intel
Icon for Frequent Contributor rankFrequent Contributor
5 years ago

Hi Sir,

Here is the version.


acds/20.2/50,modelsim_se/2020.2



  • rsing108's avatar
    rsing108
    Icon for Occasional Contributor rankOccasional Contributor
    5 years ago

    Thanks @BoonT_Intel . I think there is an issue with the modelsim version 16.5c I am using. Will try updating to a newer version and post an update. Thanks for you help.