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DZuck1's avatar
DZuck1
Icon for Occasional Contributor rankOccasional Contributor
6 years ago

Stratix 10 - 10G LL MAC Ignoring Set_False_Path commands in auto-generated SDC file

I used Quartus Pro 19.1 to generate a sample design using the 10G LL MAC for the Stratix 10. I slightly modified the sample design and integrated it into my larger design for the Stratix 10. When I ...
KhaiChein_Y_Intel's avatar
KhaiChein_Y_Intel
Icon for Regular Contributor rankRegular Contributor
6 years ago

Hi,

I compared the design attached and the example design, I found out that the ignored constraints are due to the missing address decoder in the design attached. I tried to locate every missing registers specified in the ignored constraints in example design, these registers' input are from dut_inst|address_decoder_inst|mm_interconnect_0|mm_to_mac_0_avalon_universal_slave_0_burst_adapter|altera_merlin_burst_adapter_13_1.burst_adapter|*, which is missing in the design attached (see attached set_false_path.txt).

I checked with the team, the HDL file types option is supported for IP level and not for other files which is not .ip based. Customer can make modification on the wrapper file in any languages depends on their needs but there is only one type of HDL language for non-IP based file as this is just an example design.

Thanks