Forum Discussion
Altera_Forum
Honored Contributor
15 years agoHello,
I have played with the timing settings of the SDRAM controller without much success. Modifying the t_ac access time and the t_wr (data write recovery time) resulted in a greater range of erroneous values but no signifcant change in reliability. I put SignalTap on the SDRAM data and control lines and my scope on a couple to have a look at what it was doing. (At this point I was writing a value of 185, below 255 so I could try and see why the bytes were shifting position) The only thing that stands out to me is the waveform of the line Data0 on the scope in comparison to the clock, and that is that its rise time is equal to an entire wavelength of the clock, could this be the source of the errors?