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Honored Contributor
Honored ContributorSlow DDR2 reading
Hello, I'm implementing a FIFO using the DDR2 RAM in a 3C120 development board. Basically, I have two memory pointers, one for writing and one for reading, and I sequentially write 255 64-bit word...
Altera_ForumHonored Contributor
Honored ContributorIt depends how You assert other signals. E.g. I use simple write, but burst read in my DMA.
Add some code and signaltap screenshots if possible.
