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AAlph's avatar
AAlph
Icon for New Contributor rankNew Contributor
7 years ago

simulate an LVDS soft core IP

Hi everyone I'am trying to simulate the LVDS soft IP on MAX10 FPGA using modelsim-altera it works fine with the receiver but when simuling the transmitter i get those errors Loading fiftyfivenm.fi...
AnandRaj_S_Intel's avatar
AnandRaj_S_Intel
Icon for Regular Contributor rankRegular Contributor
7 years ago

Hi,

  1. We have tried to simulate LVDS soft IP on MAX10 FPGA for both receiver and transmitter configuration with other setting being default which worked fine. Attached respective image and Modelsim transcript.
  2. Used Quartus STD 17.0 & Modelsim 10.5b SE.

Try to regenerate the IP and simulate with appropriate modelsim version based on Quartus version used.

  • Can you give more info on Tools used?

Let me know if this has helped resolve the issue you are facing or if you need any further assistance.

Best Regards,

Anand Raj Shankar

(This message was posted on behalf of Intel Corporation)