SigTest 6.1.06 support
Hello. I have questions regarding the SigTest 6.1.06 for PCIe6 spec.
I saw this post where some Intel employee said "SigTest is a design-in tool. Maybe you can get help from customer service below.
https://designintools.intel.com/customer-service
"
However when contacting Design-in Tools team they said: "Please contact support at the SW source, DesignInTools cannot assist you". In the suggested "Development Software Support Options" category it says i should have "Priority Support" enabled to get support here which i seem to have using my company email. There, they said "to assist you on this, kind go to this link Intel Community - FPGAs and Programmable Solutions and you may proceed to post your question on the appropriate subforum topic" which i am doing here.
Does someone in the community know how to answer the questions below?
- Is SNDR processing working on SigTest 6.1.06?
I get “Unsupported test flow” when running with your test example in CLI Docs (btw you had SNDR_RLM argument after 6_0 but it seems that is the folder inside the templates which is SNDR_Matlab and not SNDR_RLM). The SNDR.dat inside seems to be empty or just has some message.
I tried with several waveforms and patterns but the issue seems to be that SNDR is not working in this tool.
(image1/2/3)
- Jitter meas – do we need a specific number of samples/periods for this to be processed?
(image 4)
- Can Intel share the source files for Sigtest? Python maybe.
Thanks,
André Leitão
Test & Validation Engineering, Staff Engineer
Synopsys