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Altera_Forum's avatar
Altera_Forum
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18 years ago

Should I expect critical warnings in DDR IP code?

I have a 7.2 design with the Altera DDR SDRAM controller megacore function. My design seems to work but I am getting the following critical warnings: Critical Warning: (Critical) Rule A102: Regi...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Excellent answer! I am using OpenCore, as my subscription expired during 7.1, and when I tried to invoke the grace period, I found it doesn't include IP support, so I dropped back to the web version of 7.2!

This also seems to answer another question I had. Where is sld_hub coming from? No doubt it disappears when I get rid of the OpenCore ... To bad Altera couldn't have put some hardware support like a global reset tied to to the JTAG block for OpenCores support. That might make OpenCores more transparent. I wonder if the cost per chip would have been significant ...

Anyway, as I said, a great answer. Looks like you "hit the nail on the head".

Thanks

Steve