Forum Discussion
Knug
Contributor
5 years agoset_max_delay / set_min_delay & set_output_delay query
I tried constraining the following using set_max_delay & set_min_delay flash_nce output port :
set PERIOD_CLK 100.000
create_clock -name {clk} -period $PERIOD_CLK -waveform { 0.000 50.000 } [get...
SyafieqS
Super Contributor
5 years agoHi Kevin,
Can you try to add set_output_delay constraint to fpga_dclk port and see if there is warning regarding it.