Forum Discussion
ShafiqY_Intel
Frequent Contributor
6 years agoHi Shiva,
For your MAX 10 RSU design, are you using both of these IP?
- On Chip Flash Intel FPGA IP = Used to get access to flash (read/write)
- Dual Configuration Intel FPGA IP = Used to trigger reconfig, select CFM0/CFM1.
You need to have these two IP for MAX 10 RSU Design.
Thanks