Forum Discussion

Occasional Contributor

7 years ago

Regarding receiver detection logic in Arria10 Transceiver Native PHY

We are using Arria10 Transceiver PHY configured for 10Gbps data rate. The Transceiver configuration rules has been set to "PCS Direct" and the PMA configuration rules has been set to "BASIC". With th...

SKuma36

Occasional Contributor

7 years ago

Hello Chee Pin, Thanks for the response. Rgds, sunil

Forum Discussion

Regarding receiver detection logic in Arria10 Transceiver Native PHY

Recent Discussions

Agilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wanted

Agilex 7 slew rate reconfiguration

Agilex-7 AXI MCDMA for PCIe hang

Constraints not being picked for DCFIFO

Can't generate F-Tile Ethernet Hard IP Design Example