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Sai2403's avatar
Sai2403
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7 months ago

Regarding MIPI CSI 2 TX

Hi, In my Project, I have to generate test pattern data and send it to MIPI CSI 2 via AXI stream, and MIPI CSI 2 will send the pixel data to link_0 of MIPI DPHY IP , but when i try to simulate the de...
mipi
Wincent_Altera's avatar
Wincent_Altera
Icon for Regular Contributor rankRegular Contributor
7 months ago

Hi Sai2403 ,

 

is there anything else you think I can better assist you ?

Regards,
Wincent

Sai2403's avatar
Sai2403
Icon for New Contributor rankNew Contributor
6 months ago

Hi wincent,

we took reference from simulation, and had developed AXI stream interface to drive the MIPI CSI TX input, we observed that clock would be available for few cycles and will stop generating. Is there signal to indicate internal PLL has set properly, or any parameters need to enable to observe the clock ?  we were able to see clock and data on dphy lanes in simulation but couldn't on hardware.

regards,

sai2403

  • Wincent_Altera's avatar
    Wincent_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 months ago

    HI Sai2403​ ,

    Can you please share me your simulation result waveform (expected)
    and HW waveform (fail) 

    That can help me better understand what you are seeing and provide a better future step.

    Regards
    Wincent

  • Wincent_Altera's avatar
    Wincent_Altera
    Icon for Regular Contributor rankRegular Contributor
    6 months ago

    Hi ,

    Is there any update on the waveform ?

    Regards,

    Wincent