Forum Discussion
Regarding MIPI CSI 2 TX
Hi Wincent,
can u provide any example designs or reference designs which are related to MIPI CSI 2 Transmitter? All the available references are for Receiver part only.
Regards
- Wincent_Altera7 months ago
Regular Contributor
Hi Sai,
If you looking at only simulation purpose, you may generate one from Quartus IP catalog
There will have a testbench that you can try it out. Let me know if you unable get it.

Regards,Wincent
- Wincent_Altera7 months ago
Regular Contributor
- Sai24036 months ago
New Contributor
Hi wincent,
we took reference from simulation, and had developed AXI stream interface to drive the MIPI CSI TX input, we observed that clock would be available for few cycles and will stop generating. Is there signal to indicate internal PLL has set properly, or any parameters need to enable to observe the clock ? we were able to see clock and data on dphy lanes in simulation but couldn't on hardware.
regards,
sai2403
- Wincent_Altera6 months ago
Regular Contributor
HI Sai2403 ,
Can you please share me your simulation result waveform (expected)
and HW waveform (fail)
That can help me better understand what you are seeing and provide a better future step.
Regards
Wincent