Reed Solomon IP Core

Hello WrongHorizon,

Thank you for explaining the absence of the clock signal. I am still confused though, because, if I do not know what the clock frequency is (or cannot set it), how do I set the rest of the control signals (sink_eop, sink_sop etc) to align with the rising edge of the clock .

As far as the design goes, my outputs do not make any sense, in fact I think it is just garbage (see attachment). I read through the documentation to build the control signals (although these are perfect square waves without any rise/fall times).

It is possible that this set up is completely wrong. Can you please point me to some simple examples involving the RS Encoder?

Thank you,

Rohith