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RTL_FPGAs's avatar
RTL_FPGAs
Icon for New Contributor rankNew Contributor
5 years ago

Reed Solomon ii IP core simulation fails to compile in ModelSim

Hello, I was trying to simulate the Reed Solomon ii DECODER IP provided by Intel with Quartus Pro 20.1, but ran into a compilation issue out of the box. The IP core parameters are configured to gen...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


I believe the initial inquiry has been addressed. I will continue to follow up with Engineering offline. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.