New Contributor
Super ContributorHi @akaanb ,
Then you have to use other boot method as mentioned before. May be boot from on-chip flash check this link https://www.intel.com/content/www/us/en/docs/programmable/683689/current/processor-booting-from-on-chip-flash-ufm.html then replace the on-chip memory (OCRAM) with external ram (DDR2).
Example design from Design Store:
https://www.intel.com/content/www/us/en/design-example/714513/max-10-boot-from-on-chip-flash.html
Thanks,
Best Regards,
Sheng
New ContributorDear Sheng,
Okay but I don't want to boot from on-chip flash. Product already has an external flash and uses Cyclone IV(as far as I can see it doesn't have an internal flash). We normally use sof and elf file to create a jic file and use it to program flash. But like I said, this application will be used only for repairing and product test purposes. So I power-up the FPGA and then use .sof file to program. After that I build the small mem test application using .sopcinfo file and build the software project. Then I click run-on-hardware to download my program.
You can quickly check this video to understand my process: https://www.youtube.com/watch?v=oFR4KKOasG4
So all my process is static and I don't want to download FPGA sof and software elf to flash because this is 1-run test. It is okay that it won't run when we power-off and power-on again.
Please correct me if any of my expectations are wrong.
Best Regards.
Thanks in advance.
