Forum Discussion
RicardoC
Occasional Contributor
2 years agoCXL IP Debug Toolkit
Hello, An Intel development kit DK-DEV-AGI027R1BES with the CXL Type 3 Example Design image causes an AMD Siena architecture system to reboot when a single write is issued. The information extracted...
RicardoC
Occasional Contributor
2 years agoHi WZ,
I hope are recovering well.
The document that you pointed to has the CXL registers addresses. It does not provide any information on the debug registers that the Debug Toolkit outputs.
We are using the original pof image shipped by Intel.
Regards,
Ricardo