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NGord
Occasional Contributor
Occasional Contributoraltera_mem_if_ddr3_emif
Hi altera_mem_if_ddr3_emif used to have a parameter box 'enable afi half rate clock' in Quartus 18 Somewhere between V18 and V23 it has disappeared and I cant get afi_half_clk to work a...
NGordOccasional Contributor
Occasional ContributorIs the issue that the MAX10 PLL doesnt have enough PLL outputs?
