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Altera_Forum's avatar
Altera_Forum
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14 years ago

questions about clock frequency in DSP-BUILDER

Hi everyone:), I wish to use a really low clock frequency in DSP builder, say about 100HZ, it does not need to be very accurate. since PLL won't work. Here's my idea: 1. in VHDL, it could ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

In DSP Builder, you can try Clock/Clock_Derived to generate different clock, or you can try Tsamp to change clock...