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pwiln's avatar
pwiln
Icon for New Contributor rankNew Contributor
7 years ago

Question about IP : Altera ASMI Parallel IP Core

When performing command Erase a sector : At the end of command , signal busy is deasserted Did this mean that the sector erasure has been completed or I have to check status register bit 0 whi...
Nooraini_Y_Intel's avatar
Nooraini_Y_Intel
Icon for Frequent Contributor rankFrequent Contributor
7 years ago

Hi pwiln,

The busy signal goes high when the ASMI IP core is executing a valid operation (in this case erase operation), and it goes low after the operation completes. Which configuration flash device are you referring to? For EPCS and EPCQ device. you don't require to read the status register. For EPCQL device , you can try to read the status register bit 0 to know if the erase operation is in progress or complete.

Regards,

Nooraini