Problem with DDR2 SDRAM Controller with Altmemphy

Question

Hi,

I have been working with Quartus 10.1sp1 web edition with cyclone III Development kit for 6 months now but some time ago the s/w stopped generating the .limited sof file if I used High Performance Arch II in the design which previously was working fine. It works only with HPC architecture in DDR2 SDRAM controller. I uninstalled and reinstalled many times but still the problem exsists.

Does anyone have the same problem? I dont understand why this problem occured.Does anyone know about it?

Thanks

Sn

altera_forum · Answer

What problem? The core doesn't generate .sof file at all or does generate, but not time limited?

altera_forum · Answer

Doesnt generate the.limited file.

altera_forum · Answer

So it doesn't generate any .sof file at all? Then check if You haven't disabled the .sof file generation if there ore time limited cores.

altera_forum · Answer

It modifies the .sof file but the same design which was worked before with .limited sof file doesnt work with .sof file.It is strange..Since I am using the free version it should create the .limited sof file which is not being generated

altera_forum · Answer

I am not sure, but after certain version of Quartus, the DDR2 controller hasn't been encoded to limited version, so now it is probably free, but You better create a SR concerning this question.

Forum Discussion

Problem with DDR2 SDRAM Controller with Altmemphy

8 Replies

Recent Discussions

SerialLite II license for Arria10 FPGA

Agilex3/5 GTS Hard Ethernet IP 10G example design pin loc and io std wanted

CORDIC ATan2 Failed to Generate

Configurable transceiver enable

Where is High Speed Transceiver Demo Design in FPGA Wiki ?