Forum Discussion
Nathan_R_Intel
Contributor
6 years agoHie,
The design attached in the Cyclone V SOC Kit installer package was not intended to be used with Transceiver Toolkit. It was intended to be used with the Board test System.
Hence, please try using a design targeted for Transceiver Toolkit. We have a reference design Transceiver Toolkit for Cyclone V. Please use this reference design and migrate over to Cyclone V SOC Devkit.
This should ensure your Transceiver Toolkit is working correctly.
Please get the Cyclone V Transceiver Toolkit design from following link:
https://fpgawiki.intel.com/wiki/Transceiver_Toolkit
As for using Transceiver Toolkit, you can refer to the following How-To-Video. Hope this helps with your issue.
https://www.youtube.com/watch?v=0oO1RFa-4Xk
Regards,
Nathan
- MEmel16 years ago
New Contributor
Hi, Nathan
Thanks for your reply!
As far as I understand, I did exactly what you suggested. I took cv_GX_1ch_40b_3125mbps reference design for Cyclone V GX and modified it for Cyclone V SoC Devkit, as I mentioned in my previous post.
As for the video, it focuses on using ADC Toolkit for MAX devices. Few things concerning basic design flow in Qsys were useful, but I can't see how is that relevant to Tranceiver Toolkit and my issue especially.