Problem in signal compiler

when i double click on signal compiler on my model and perform the step 1, 2, 3 to generate VHDL code, synthesize and download to Altera DSP board (Cyclone II EP2CS5) , all the program related to the project will jammed. And it happen when i click on the compile button. but this problem will not happen when i use the pc in other workstation.

is this because of my matlab or quartus configuration problem?