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Altera_Forum's avatar
Altera_Forum
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14 years ago

PLL IP Core

Hi,

I'm interesting to use clock dividing/multiplication. Use the IP MegaWizard ALTPLL. As i have seen in datasheet, before the MegaWizard function will start work, the asynchronous reset (areset input) have to be done. The Quartus compilation the code was passed, but during ModelSim simulation i got the negative result. The simulation started but automatically stoped (fatal error) the same place where the asynchronous reset for MegaWizard Core was ended. The fatal error message is "floating point exception".

I tried to convert:

50Mhz to 10mhz;

50Mhz to 100Mhz;

The asynchronous reset I'm making by the counter.

what is the reason for the error?

Thanks.

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  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Hmm, reset polarity is also OK? Maybe it requires some setup time, so Your simulation is too short?

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    The simulation was running something like 30 min...the "locked" output stayed on "0" logic. PLL can't lock the phase i think.

  • Altera_Forum's avatar
    Altera_Forum
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    14 years ago

    Eurika!!!

    The problem is a result of time definition in ModelSim.

    I have taken "NanoSeconds" as time definition. But for 50MHz we have to take the "PicoSeconds".

    In other words, the ALTTTL modul and high entity were working if I was burn it into the FLASH memory of the development board.