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Altera_Forum's avatar
Altera_Forum
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14 years ago

PLL IP Core

Hi, I'm interesting to use clock dividing/multiplication. Use the IP MegaWizard ALTPLL. As i have seen in datasheet, before the MegaWizard function will start work, the asynchronous reset (areset ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

sorry,it was 10MHz.

I have tried to simulate without reset, it's running without any error. But output freq is 'X' value logic...as i said bafore i think it's happens because the ALTPLL modul not locked on my incoming freq...

I don't know why...

I used the default values of the modul, only the incoming and outcoming freqs were changed.