PLL does not lock anymore after connecting DDR3

Hi

I'm designing a system with an NIOS and a DDR3 HMI.

The fist shot was to implement the NIOS with internal RAM and a PLL. The PLL generates 50MHz from my connected 25MHz crystal. This setup works fine, and the Hello World from NIOS works as well.

Now I would like to have the DDR3 SDRAM running. But since I intergated the DDR3, my PLL doesn't lock anymore!!

The refclock for the DDR3 is directly from the 25MHz crystal and i can see the 355MHz AFI is coming out (with a scope).

I tried to connect the PLL for the Nios to

-directly the same 25MHz-Pin as the DDR3

-At the AFI 355MHz output

But the PLL does not lock! Not at 50MHz or at 71MHz which would be 355/5

Thanks for any advice