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Altera_Forum's avatar
Altera_Forum
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18 years ago

PCIe without Rate match FIFO

Hi, Does anybody know why a PCIe IP with rate match FIFO turned off gives the following error during compilation. It would seem to me that the IP should produce code that compiles or at least l...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Try applying these settings in your QSF:

set_instance_assignment -name GXB_0PPM_CLOCK_GROUP 1 -to *altpcie_serdes*alt2gxb_component|channel_rec[*].receive

set_instance_assignment -name GXB_0PPM_CLOCK_GROUP_DRIVER 1 -to *altpcie_serdes*alt2gxb_component|channel_quad[0].clk_div