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xalverti's avatar
xalverti
Icon for Occasional Contributor rankOccasional Contributor
2 years ago
Solved

PCIe test from devkit not working on DK-DEV-AGI027RBES

Hi,

I am trying to setup the specific device -- and started with the examples from here:

https://cdrdv2.intel.com/v1/dl/getContent/778611

I am using Quartus 24.1.

When I compile the pcie_ed example it has a critical warning of failing to meet timing constraints.

If I program the FPGA with the pof file generated from the produced sof file, the device is not detected through lspci.

Through configuration device I see that the device is in USER MODE after programming.

Do you know what could be the case?

Best Regards,

Chloe

Pcie
  • xalverti's avatar
    xalverti
    2 years ago

    I changed the device PCIe slot and somehow it worked. I mark this case as resolved.

5 Replies

  • xalverti's avatar
    xalverti
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    Please note that we have both tried with cold and warm power cycles after programming and we never detect the device with lspci.

  • xalverti's avatar
    xalverti
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    No, we have never tried with the sof file alone. We only try with pof file.

    We followed the steps you mention so this is not the issue.

    How should we proceed?

    Chloe

  • xalverti's avatar
    xalverti
    Icon for Occasional Contributor rankOccasional Contributor
    2 years ago

    I changed the device PCIe slot and somehow it worked. I mark this case as resolved.

  • Wincent_Altera's avatar
    Wincent_Altera
    Icon for Regular Contributor rankRegular Contributor
    2 years ago

    Hi


    Glad that you solve the problem, thanks for sharing with me the solution as well.

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