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PPham3's avatar
PPham3
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7 years ago
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PCIe SRIOV Avalon Stream Gen 3 automatically generate locked read request

Hi all, I have a problem with PCIe SRIOV avalon stream. I used SRIOV example design but tried to take the tx stream and rx stream out of the APP function. When I get those signal to signaltap. I not...
  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    7 years ago

    You need APPS in order to make your design fully function. Without the APPS, the Host should still detect end points, and I don't aware any specify signal need to be connected.

    Regards -SK ​

PPham3's avatar
PPham3
Icon for New Contributor rankNew Contributor
7 years ago

Hi SK Lim,

I did not check LTSSM signal. Was that signal meaningful for simulation only?

Still can not bring PCIe up without the APPS part? could you please give me a hint about connection? what the APPS really does to make this design work?

Thanks.