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PPham3's avatar
PPham3
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7 years ago
Solved

PCIe SRIOV Avalon Stream Gen 3 automatically generate locked read request

Hi all, I have a problem with PCIe SRIOV avalon stream. I used SRIOV example design but tried to take the tx stream and rx stream out of the APP function. When I get those signal to signaltap. I not...
  • SengKok_L_Intel's avatar
    SengKok_L_Intel
    7 years ago

    You need APPS in order to make your design fully function. Without the APPS, the Host should still detect end points, and I don't aware any specify signal need to be connected.

    Regards -SK ​

PPham3's avatar
PPham3
Icon for New Contributor rankNew Contributor
7 years ago

I made a mistake. It was not a read req message, it's type just appears to be broadcast message from root complex. Just dont know why this message is automatically sent down.

By the way, when I use the hard ip only, pcie is not detected through lspci from linux. Everything works when using example design, anyone faces this problem?

Thanks​