PCIe IP information needed & provided!!

Hi,

I'm writing a message to ask if someone could put an schema of the signals we have to connect, especially for the input clocks, to the alt2gxb for a PCIe 1.1 link. Does the alt2gxb work without any digital/analog reset as it's suggested in the minimal version of it?

The documentation isn't very clear and apparently, Altera Support are not very motivated to answer me.

In exchange of some info I can lead someone who needs into the entire process of coding a complete PCIe IP (I've done a 1x and 4x) and I can help with the XIO1100.

Thanks

Marc