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FvM
Super Contributor
Super ContributorPCIe hprxm_master doesn't handle unaligned reads correctly
Hello, we have an Arria 10 PCIe design with MM DMA interface, utilizing hprxm_master (bursting BAR2 rxm) for non-DMA access. Platform designer IP does a good job translating between different clock d...
FvMSuper Contributor
Super ContributorHi,
my answer was phrased ambitiously. I didn't yet contact design team, I'd need to make the contact through FAE. I was rather hoping that the discussion is monitored by support and forwarded respectively. If there's a formal procedure to issue a support request, we might choose the option.
Presently we designed around the issue by rearranging a memory map.
Best regards
Frank
my answer was phrased ambitiously. I didn't yet contact design team, I'd need to make the contact through FAE. I was rather hoping that the discussion is monitored by support and forwarded respectively. If there's a formal procedure to issue a support request, we might choose the option.
Presently we designed around the issue by rearranging a memory map.
Best regards
Frank
