PCIe freezing

I think it does offer infinite completion credits, but they are not allocated on the RX memory and that’s what this debug output should show – otherwise the debug output would be useless. You could watch out for an increase of CPLH/CPLD values when you issued a non-posted DMA read from the application to verify this behavior.

Generally, I don’t know why large and/or frequent writes should be an issue for PCIe, the IP core or your application. They are the simplest form of transaction, and the system should not be harmed by your application improperly generating TLPs, like violation of max_read_request_size, max_payload_size, byte enables or read completion boundary (RCB).

Sorry to repeat the question: Are you handling read requests properly, i.e. either responding with valid data or sending CA? Those requests, once sent to your application, will not show up on the RX buffer usage but affects the root complex’ buffer handling and error reporting.