PCIe Example Design Simulation Failing

Based on my investigation, it's probably not due to Modelsim version... It looks more like a qsys generation problem. On that, note that I've tried 17.1 Pro as well with the same outcome. When examining the example design log I do see:

Info: pcie_example_design_inst_board_pins_bfm_ip: "Generating: pcie_example_design_inst_board_pins_bfm_ip_altera_conduit_bfm_181_o4cgbkq"

But the file is nowhere to be found... I've tried running as admin to rule out the permissions, I looked into the temp folder it appears to use but it looks like its hidden in a _db file.

Thanks your help,