Forum Discussion
MAdel
New Contributor
8 years agoPCIE example design - error compiling with Modelsim
I generated an example PCIE design for Arria 10. I then go to the sim/mentor directory, source the msim_setup.tcl and run ld, ld_debug or com TCL commands from Modelsim. In all cases, I get the follo...
AnandRaj_S_Intel
Regular Contributor
8 years agoHi,
Can you recheck the below points.
Steps:
- <example_design>/pcie_example_design_tb/pcie_example_design_tb/sim/mentor/
- do msim_setup.tcl
- ld_debug
- run -all
If you are using Quartus v18 to generate the design then use modelsim v10.6c and so on to avoid the errors.
Below link gives more information on which modelsim version can be used for quartus version
https://www.intel.com/content/www/us/en/programmable/downloads/download-center.html
Let me know if you need any further assistance.
Best Regards,
Anand Raj Shankar
(This message was posted on behalf of Intel Corporation)