PCIe device not detected after programming CVP peripheral core

Hi,

Noted that your JTAG issue could be related to ES silicon version. However, I also found that your attached design is not working.

I verified your cvp_test.qar is not working when ported over to Production device and tested in Arria 10 Development Kit. It cannot link up to LTSSM L0.

Hence, please use Quartus Generated Example design and try it on your board.

To generate the PCIe Example design, you can refer to the following user guide.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-dex-a10-pcie-avmm.pdf

Alternatively, you could try with the reference designs available in Intel Wiki as well.

https://fpgawiki.intel.com/wiki/Reference_Design:_Gen3x8_AVMM_DMA_-_Arria_10

Regards,

Nathan