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Honored Contributor
Honored Contributorpcie can't perform memory write trasaction from endpoint to rootpoint
Hi, I generated tow pcie cores by pcie compiler, one as rootpoint and another as endpoint. I configured the rootpoint and endpoint well. I can perform the memory write transaction from rootpoin...
Altera_ForumHonored Contributor
Honored ContributorThanks for your reply. My system works. I find it is just the problem of the base memory and limit registers.
I have no prefetchable bar for the endpoint. But it likes that, It need to set a value in the prefetchable memory limit and prefetchable memory base, although there is no prefetchable memory.
