Forum Discussion
Altera_Forum
Honored Contributor
Honored Contributorpcie can't perform memory write trasaction from endpoint to rootpoint
Hi, I generated tow pcie cores by pcie compiler, one as rootpoint and another as endpoint. I configured the rootpoint and endpoint well. I can perform the memory write transaction from rootpoin...
Altera_ForumHonored Contributor
Honored ContributorAccording to the trace of the test_out in the trasaction layer, I see that The root port recieved unsupported TLPs. Is it the problem of the device number and bus number ?
