PCIe AXI Streaming IP Packet Header Slot Number Details

Hi,

Both are not define the same thing, Slot Number in the PCIe header and the Physical Slot Number in the Slot Capabilities Register serve different purposes within the PCIe architecture. The former is used for transaction routing and identification, while the latter is used for system management and configuration.

Regards,

Wincent

"The former is used for transaction routing and identification," which can be achieved by Bus and Device numbers or using the Address mapping to BAR. How does this field differ from them? Could you provide more details?

Hi,

I wish to follow up with you about this thread. Do you have any further questions on this matter ?

Regards,

Wincent_Altera

Hi,

As we do not receive any response from you on previous question/reply/answer that we provided. Please login to “https://supporttickets.intel.com/s/?language=en_US’, view details of desire request, and post a feed/response within net 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on follow-up questions.

Regards,

Wincent_Altera

Hi Wincent,

Thanks for your response.

How will the mapping of these end-points based on slot number be done? Is it handled by the main system in the Hierarchy (Root Port) or by the user through user-defined interfaces?