Altera_Forum
Honored Contributor
11 years agoPCI interrupt problem
Hi
I'm developing a project with altera FPGA cyclone IV Development Board connected to a PC via PCIe bus. I'm trying to generate a PC Interrupt when a push button of the dev board is pressed. I use Quartus 2 Version 12.1 and Qsys tool , the top entity is written in verilog. In Qsys I have connected the PCIe IP with an onchip_memory and a PIO avalon interface, the bar are configurated in this way: bar 0 (32 bit not prefetchable) 0x00000000 0x00003fff onchip_memory || 0x00004000 0x00007fff cra register bar 1 (32 bit not prefetchable) 0x00000000 0x00003fff PIO the interrupt signal of the PIO module is connected with the RXmIrq0 of the PCIe The PCIE ip compiler is configurated :- number of lane 1
- completer only
- ref clock 100Mhz
- it's possible to check if the interrupt signal is generated by the PIO module, for example by blinking a led?
- I succedded in reading and writing the on_chip_memory with a custom wince driver but this driver doesn't capture the interrupt signal. The status register at address 0x40 of the CRA is always 0 , what I have to check ?
- The windows driver must clear the interruptmask register of the PIO interface and also the PCIE interrupt status register ?
- What is the Address Translation Table of the CRA ?