For '1: IP', I see that the configuration of the Altera PCIE endpoint IP allows me to select whether the endpoint is slave/sink only, or whether it can send requests out too. So that confirms for me that this endpoint IP should be capable of initiating transactions.
For '2: system', I guess most folks are content w/ a PC as the root complex, and that I'll have to get some root complex IP like fuzzyRobb suggested.
I was hoping to use PCIE communication without requiring an entire system (CPU/PC) upstream of the switch... for a switched backplane where the switch(es) could power up & bring up the links and maybe allow configuration of endpoint BARs & etc to be initiated by one of the endpoints or something. Or perhaps a small SBC that could include rudimentary PCIE enumeration/configuration to get things to that point.
Oh well, guess I'm stuck w/ a PC playing root complex (& switch) until I can get root complex IP in one of my fpgas. :)