PCI-e configuration registers

I have some confusion while using the test simulations of Altera PCI-e core . I want to know what are the basic configuration registers that i should program before using simple memory read and write transactions.

The simulations set they provide uses hard-coded routines that are not clear to me. I think it would be better option to use a root port to program the BARs using configuration TLPs.

I haven't read the complete specs of PCI-e so it will be helpful for me if anyone can share the basic registers that should be program first. I only knows about the base address registers that should be programed first by the root side.

Thanks in advance!!