Outputs from decimatingCIC are shifted (i.e. input at channel c2 appears at c0)

Hello kaz,

Thank you very much for your reply. I attached the filter report in this comment.

If I under stand it correctly I need to put 32 channels in both serial and parallel.

like this:

Input Data Format (Repeats every 5 clock cycles)

<c00><c01><c02><c03><c04>

<c05><c06><c07><c08><c09>

<c10><c11><c12><c13><c14>

<c15><c16><c17><c18><c19>

<c20><c21><c22><c23><c24>

<c25><c26><c27><c28><c29>

<c30><c31><c32><c33><c34>

I put every 5 data in series and there are 7 of these serialized signals I fed to the CIC filter.

I expect the output signals to be like what it is specified in the report:

Output Data Format (Repeats every 160 clock cycles)

<c00><c01><c02><c03><c04><c05>.......<c30><c31><---><---><---><--->.....

However, What I got is something like..

<c01><c02><c03><c04><c00><c05>.......<cxx><cxx><---><---><---><--->.....

The order of the data seems to be shifted.

Thank you.