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ElizabethJaison's avatar
ElizabethJaison
Icon for New Contributor rankNew Contributor
4 years ago

output data format of FFT IP core

Hi, I was doing the simulation of FFT IP in Quartus Prime (Board selected: intel Altera Arria10GX). The IP configuration is given as shown in the attached snippet. The input data to the IP is in Q1...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


Thanks for your clarification. As I look at your IP configuration, you seems to be pruning the output width to 18 bits. With this, configuration, the format should be Q17 as well. You can perform a Modelsim simulation to further verify on this. Note that normally after the FFT operation, there will be bit growth. With pruning to 18 bits output, you should expect magnitude truncation as well as low magnitude samples being pruned off.


Please let me know if there is any concern. Thank you.