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ElizabethJaison's avatar
ElizabethJaison
Icon for New Contributor rankNew Contributor
4 years ago

output data format of FFT IP core

Hi, I was doing the simulation of FFT IP in Quartus Prime (Board selected: intel Altera Arria10GX). The IP configuration is given as shown in the attached snippet. The input data to the IP is in Q1...
CheepinC_altera's avatar
CheepinC_altera
Icon for Regular Contributor rankRegular Contributor
4 years ago

Hi,


As I understand it, you have some inquiries related to the FFT IP. For your information, it is recommended for you to perform a Modelsim simulation with your targeted configuration and input data to verify the expected output. Also, Modelsim simulation will help to isolate any functional problem prior to hardware testing.


By the way, just to ensure we are on the same page, would you mind to further elaborate on the following:


1. What is the Quartus edition that you are using? I understand from the screenshot that you are using version 18.1.


2. Mind further elaborate one the "Q17 format" that you are referring to?


Please let me know if there is any concern. Thank you.