Forum Discussion
Altera_Forum
Honored Contributor
18 years agoOpenCore [I2C_Master_Slave] _Newbie
I am a newbie. I download I2C_Master_Slave ip core from OpenCore web site. Then I inport to QuartusII Web Edition,then compiler,I got the error message,below. "Error (10207): Verilog HDL error...
Altera_Forum
Honored Contributor
18 years agoIt seems that you try to compile test bench/reference model file(s), which could not be synthesized in Quartus.