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Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
18 years ago

Open Core IP time limited source files expired.

hi, after using Quartus II 7.0 full version and the NIOS 2 open core plus for a week. I could not synthesize my NIOS 2 system since the cpu.v is a time-limited files. do you guys have this problem? ...
Altera_Forum's avatar
Altera_Forum
Icon for Honored Contributor rankHonored Contributor
14 years ago

Woohoo.. I had the same issue and was wondering! Thanks for the solution QuartusPenguin..

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Hi Dimo

I have seen this before with opencore / opencore plus.

The problem you are seeing is because you have 3rd party simulation enabled (hence the EDA netlist writer is running, which is where the error is being seen).

Opencore plus does not allow creation of simulation netlists. Try turning this option off under settings->eda tool settings->simultion. (select no simulator)

If this still doesn't work try removing the PCIE.

Cheers

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