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I was just following one of the tutorials on building system using SOPC builder. When I tried using the programmer it said that the file had a few IP core services which uses hardware evaluation and hence I could not program it into the FPGA.
I am using DE2 kit from Altera and I have not purchased a license.
As soon as I click on the programmer, a dialog box pops up which tells me that the file is time limited.
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You are probably misunderstanding the meaning of the warning messages. The programmer can configure the FPGA with a time-limited SOF.
You should see two warning messages. One is from the assembler. It is telling that it can't generate device programming files. This means it can generate a SOF for configuring the FPGA, but it can't generate a POF for programming a flash device.
The second warning is from the programmer when configuring the FPGA. The warning is telling you that it is a time-limited SOF. This means that the evaluations cores require a permanent link with Quartus programmer, or they would stop working after a certain time.
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