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Altera_Forum's avatar
Altera_Forum
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18 years ago

Open Core IP time limited source files expired.

hi, after using Quartus II 7.0 full version and the NIOS 2 open core plus for a week. I could not synthesize my NIOS 2 system since the cpu.v is a time-limited files. do you guys have this problem? ...
Altera_Forum's avatar
Altera_Forum
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18 years ago

OpenCore Plus allows you to run an IP Functional Simulation model in any VHDL or Verilog simulator. It does not allow you to simulate at the gate level.

There was a problem found in Quartus 7.1 that exhibited strange behavior for OpenCore Plus. There is a patch available. See http://www.altera.com//support/kdb/solutions/rd07272007_148.html