Naveena_P_IntelNew Contributor6 years agoNeeds help on clarification on Scemi clock control Stratix 10 1SG280LU3F50E1VG Quartus 18.0.0.0 Build 2019 04/25/2018 SJ Pro Edition Patches Installed: 0.06 We wanted advise on how to do Scemi clock control. I am using a PCIe HIP and using its c...Show More
KennyT_alteraSuper Contributor6 years agoYou have to check if you have written the correct constrain and the timing is closed for your design.
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