Forum Discussion
Naveena_P_Intel
New Contributor
New ContributorNeeds help on clarification on Scemi clock control
Stratix 10 1SG280LU3F50E1VG Quartus 18.0.0.0 Build 2019 04/25/2018 SJ Pro Edition Patches Installed: 0.06 We wanted advise on how to do Scemi clock control. I am using a PCIe HIP and using its c...
KennyT_altera
Super Contributor
Super ContributorYou have to check if you have written the correct constrain and the timing is closed for your design.
