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HypeInst's avatar
HypeInst
Icon for New Contributor rankNew Contributor
5 years ago

NCO IP uses far too many M10K blocks

When I add one (1) NCO from Intel's IP Catalog to my design, the M10K-block usage increases by 576, exceeding the capacity of the Cyclone V device. The Intel NCO IP Core User Guide states that M10K...
Nurina's avatar
Nurina
Icon for Regular Contributor rankRegular Contributor
5 years ago

Hi,


The user guide numbers are only for a particular (unspecified) configuration of the NCO.


In multiplier-based architecture, every two bit increment of the angular resolution doubles the required depth of the memories. At 16 bits, only 2 M10Ks are required. So you'll have to reduce the angular resolution to reduce the M10K usage.


Let me know if you have any more querries.

Regards,

Nurina


  • HypeInst's avatar
    HypeInst
    Icon for New Contributor rankNew Contributor
    5 years ago

    Hi Nurina,

    I understand. Thank you for your research time and response!

    Regards,

    HypeInst